Comparators are common circuit elements which find application wherever the comparison of voltages is required. To facilitate this function, the comparator input normally comprises two transistors which are connected as a differential amplifier. During operation, the comparator input sources or sinks a small current. This current is referred to as the input bias current, I.sub.B, and it corresponds to the base current of the transistors which form the comparator's differential input. Typically, I.sub.B ranges from tens of nanoamps up to tens of microamps, depending on the type of transistor used in the comparator. For example, the low gate current of Field Effect Transistors (FET) means that a comparator based on these devices will have a correspondingly small I.sub.B.
In the absence of a current compensation circuit, the circuit driving the comparator must source or sink the necessary input bias current. For low levels of I.sub.B, this requirement places little demand on the driving circuit. However, faster comparators are usually based on the high current operation of bipolar transistors and require higher input bias currents to operate properly. The input current demands of high speed comparators are a consequence of the lower and non-linear input impedances of bipolar transistors. As a result, additional demands are placed on the driving circuit since it must be capable of providing large and changing input bias currents. These current demands load the driving circuit and prevent accurate voltage comparisons.
Load is of particular concern where the driving circuit must source current to or sink current from more than one comparator. In this case the accuracy of the driving circuit will be further limited.
The conventional comparator circuit of FIG. 1 represents one approach to limiting the current requirements of the driving circuit by using a buffer circuit 11. The comparator input comprises input transistors 12, 14 which are connected in a standard differential amplifier configuration. For simplicity, only the input of the conventional comparator circuit is shown in FIG. 1.
One input 10 of the buffer circuit 11 is connected to the gate of an input buffer Junction FET (JFET) 16. The JFET 16 is wired as a source follower with its first current carrying terminal connected to a supply voltage, V.sub.77. Its second current carrying terminal is connected to a second voltage supply through a resistor 18 and to the base of comparator input transistor 12. Similarly, a second input 20 of the buffer circuit 11 is connected to the gate of an input buffer JFET 22. The JFET 22 is wired as a source follower with its first current carrying terminal connected to a supply voltage, V.sub.77. Its second current carrying terminal is connected to a second voltage supply via resistor 24 and to the base of comparator input transistor 14.
In the conventional comparator circuit of FIG. 1, the low gate current of the source follower JFETs 16, 22 means that the circuit driving the JFET inputs 10, 20 does not need to supply large bias currents to the comparator. This solves the high I.sub.B problem only to create a new problem. JFETs are significantly slower than high speed comparators and thus limit the speed at which the comparator output can be switched.